This aim of this project is to convert the JPEG encoder from VHDL to the Migen/Misoc . Different modules of the encoder are been implemented using the python libraries(Migen) and as a minor modification to the initial architecture of the encoder which include FSM machine for passing the data from one submodule to the other , this include Ready-Valid Handshake Protocol (Streaming Version of the JPEG encoder) for doing so. All the major work regarding the issue will be done under in the HDMI2USB-litex-firmware repository based on the issue #31[HDMI2USB] Convert the JPEG encoder from VHDL to Migen / Misoc.

Organization

Student

Ishan Bansal

Mentors

  • Joel
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2017