The home for open source hardware, EDA tools and the related ecosystem

We are a group of developers and open hardware enthusiasts from the open source silicon community, that formed the FOSSi Foundation. It is a non-profit foundation with the mission to promote and assist free and open digital hardware designs and their related ecosystems. The FOSSi Foundation operates as an open, inclusive, vendor-independent community.

Our goal is to promote and assist free and open digital hardware designs and their ecosystem. Such hardware designs can for example be single "IP blocks" or entire system-on-chip (SoC). Our vision is that there will be multiple open source chips in the next years. Our main effort is our community hub website

Beside single components and entire SoCs, we see open source Electronic Design Automation (EDA) tools as a crucial for the advance of FOSSi. We therefore encourage and support open source synthesis tools, simulators and system generators, just to mention a few.

With those activities we are steadily working on advancing FOSSi and make it the next success after Open Source Software and (tangible) Open Source Hardware. We are open to proposals that help us getting in the direction of "open source chips". Please find a list of a few ideas, and we highly encourage you to think beyond that.

Google Summer of Code students are invited to present and demonstrate their projects at our annual conference ORConf with 100-200 attendants, which is held in Gdansk, Poland, on September 21-23.

lightbulb_outline View ideas list


  • fpga
  • verilog
  • c
  • chisel
  • synthesis


  • Other
  • open hardware
  • debugging
  • eda tools
  • web community
comment IRC Channel
email Mailing list
mail_outline Contact email

Free and Open Source Silicon Foundation 2018 Projects

  • kunalgulati
    BaseJump STL Hacker
    I'm proposing the creation of a Math Library for BaseJump STL. Adding a set of routines that employ the CORDIC algorithm to implement directly and...
  • Ahmed Salman
    Develop a Transaction-Level Verilog Component Library
    Transaction-Level Verilog (TL-Verilog) is an emerging language extension to System Verilog, Has the ability to define flexible reusable components. ...
  • Sriyash Caculo
    Digital Filter Block Implementations in MyHDL and PyFDA Integration
    Design and implementation of digital filters is essential for electronics engineers. Digital filter design in hardware usually is a two stage...
  • Noe Nieto
    Enable DEVSIM to simulate solar cells
    DEVSIM is a TCAD (Technology Computer Aided Design) semiconductor device simulation software. TCAD tools are special simulation software that can...
  • Ákos Hadnagy
    Formal verification of WARP-V processor
    WARP-V is an emerging open-source CPU core generator for RISC-V CPUs. It benefits from the flexibility of Transaction-Level Verilog (TL-Verilog) to...
  • Sandip Kumar Bhuyan
    Improve the in terms of discoverability lists free and open source “IP Cores” on the website for the community to view and use. All listed projects are backed by a git...