Hardware accelerators are necessary or at least desirable in many SDR systems. GNU Radio provides an open and free platform for designing real time SDR system. This proposal elaborates the architecture of Verilog design simulation integration, utilizing the existing tool, Verilator. With this Integration, Verilog simulation could be run at real-time, as a part of the SDR system.

Organization

Student

Bowen Hu

Mentors

  • Marcus Müller
close

2019