SIMT to SPMD Translation

High Level Trigger 1(HLT1) is the first and critical stage in software reconstruction of collisions at the LHCb experiment in the Large Hadron Collider at CERN. Allen aims to do full software reconstruction on GPUs.

However the reconstruction must also be able to run on the LHCb baseline x86 architecture. Since Allen's algorithm are designed to be efficient on SIMD architectures, a natural translation to support x86 architectures is possible. The SPMD programming model bears resemblance to the SIMT programming model of CUDA, and is a natural target for code translation. Such an automated conversion would be beneficial not only for Allen, but for any CUDA projects seeking cross-architecture support.

Exploiting vectorization on modern CPU is a hard task . Manual vectorization requires lot of developer time and maintenance can be hard. ISPC raises abstraction of SIMD via the SPMD programming model. Since SIMT programming model on GPUs closely resemble SIMD, the code conversion can be automated using an intermediate translation engine. The project aims to convert from CUDA to ISPC using translation engine based on LLVM.