A completely FOSS toolchain for FPGAs.

SymbiFlow is a group of projects aimed at providing a completely FOSS flow for developing FPGA IP/gateware. We believe this will dramatically broaden the outreach of FPGA platforms and lower entry barriers into FPGA development for both professional engineers and hobbyists.

FPGAs are an exciting and versatile development platform that can be used for addressing a variety of complex tasks, such as:

  • flexible parallel I/O
  • low-latency machine learning
  • robotics and motor control
  • camera interfacing and ISP
  • hardware glue logic
  • general hardware-accelerated parallel processing

A big roadblock to what we believe should be much wider adoption are the specific tools that need to be learned on a per-vendor basis and their proprietary licensing.

By working to implement a vendor neutral and modular flow that is easy to integrate with various types of other tools, and that provides an open source, transparent development experience, SymbiFlow is meant to dramatically accelerate software-driven innovation in FPGA development.

SymbiFlow is already enabling new tools, development platforms and communities that build around the end-to-end open flow - and has made significant progress throughout 2019. But a lot of work is still needed before it becomes a standard like GCC in the software world.

To achieve SymbiFlow's goal of a complete end-to-end FOSS FPGA toolchain, a number of tools and projects are necessary. Thus, SymbiFlow serves as an umbrella project for several activities, the central of which deals with creating so-called FPGA "architecture definitions", i.e. documentation of how specific FPGAs work internally.

Those definitions serve as input to open source backend tools like nextpnr and Verilog to Routing, and frontend tools like Yosys. They are created within separate collaborating projects targeting different FPGAs - Project X-Ray for Xilinx 7-Series, Project IceStorm for Lattice iCE40 and Project Trellis for Lattice ECP5 FPGAs.

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  • c/c++
  • fpga
  • python
  • verilog


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SymbiFlow 2020 Projects

  • Bingran Hu
    FPGA Routing Management and Optimization
    I will focus on the Vehicle-to-Routing (VTR) component of the SymbiFlow project. Specifically, I will work on improving the existing electronic...
  • Andrew Butt
    Support for Partial Reconfiguration Regions in SymbiFlow
    SymbiFlow does not currently support partial reconfiguration regions. Partial reconfiguration regions are crucial to ongoing FPGA research including...
  • Shad Torrie
    Upgrading VTR flow scripts to Python3 and adding new functionality
    The VTR (Verilog-to-routing) project provides an academic open-source CAD flow for FPGAs, combining tools for Synthesis and Logic Optimization...