T1220 AXIOM Beta nMigen Support
- Mentors
- Herbert Poetzl, vup
- Organization
- apertusĀ° Association
nMigen is an HDL toolkit implemented in the Python programming language. By using nMigen instead of traditional HDLs like Verilog or VHDL, gateware can be developed in less time, with less bugs, and with extremely powerful abstractions that enable code clarity and conciseness. apertusĀ° has already developed prototype nMigen gateware for the AXIOM Micro, but wishes to extend it to support the sensor, FPGA, and HDMI interface of the AXIOM Beta. This work will develop in nMigen and demonstrate on real hardware an end-to-end imaging prototype for the AXIOM Beta: sensor control over SPI, sensor readout PHY from LVDS, pixel remapper based on existing implementation, 4K to Full HD downscaling debayerization, and final image output to HDMI.