Development of a smart CI workflow to test analog block functionality and performance in OpenFASOC

OpenFASOC, an automated SOC generator, is enabling chip enthusiasts to develop circuits/macros with a software approach. Circuits must not only be functionally proven but also need to be implemented under the rules defined by the technology to make it silicon-proven. To meet its functional and technology requirements, the generator needs to be constantly improved and with every update, the tool must be tested for its core functionalities. This proposal includes the detailed CI flow which can check the functionality and performance of the designs generated. It also includes the method to test small changes in the circuits and developing pythonic APIs for each generator to import them into larger software programs built on these generators. These APIs can also enable OpenFASOC to move from a CLI based tool to a GUI based tool.