Reference Design For A GPIO-based Parallel Bi-Directional Bus

While the BeagleBone family has a large number of pins available on their P8/P9 headers, projects requiring a large amount of GPIO I/O may still be infeasible due to pinmux conflicts with other interfaces (SPI, UARTs, etc.). The newer PocketBeagle platform is even more restricted in the number of available GPIOs for interfacing. In addition, bi-directional bus communication using GPIOs is infeasible, as each GPIO is configured for either input or output. This project will combine your hardware and software skills to address these limitations by creating a shift register-based hardware design that will allow serial streams of data going in/out of the PocketBeagle or BeagleBone family GPIOs to be mapped into a bi-directional communications bus