Open to the core - collaborative engineering for open source silicon and tools

Technologies
python, fpga, c++, risc-v, systemverilog
Topics
compilers, open hardware
Open to the core - collaborative engineering for open source silicon and tools

We produce high-quality, security-focused, open, flexible IP via projects like the OpenTitan silicon root of trust (https://www.opentitan.org). Our expertise includes processor and SoC design — with a particular focus on hardware security, design verification, RISC-V tools, and the LLVM compiler. Our mission is to unlock the potential of open source silicon and enable its widespread adoption, with more credible, accessible and efficient silicon solutions than exist today.

2020 Program

Successful Projects

Contributor
Flavien Solt
Mentor
Greg Chadwick, Pirmin Vogel, Alex Bradbury
Organization
lowRISC
Simulated memory controller
Project goal The goal of this project is to devise and implement a simulation-ready memory controller dedicated to benchmarking processor cores...
Contributor
Yuichi Sugiyama
Mentor
Sam Elliott, Pirmin Vogel, Luís Marques
Organization
lowRISC
Proof-of-concept integration of pointer authentication support in Ibex
Pointer Authentication is a software security primitive that makes it much harder for an attacker to aggravate attacks targeting arbitrary code...